With an ATM network, data streams of various telecommunication services requiring different bit rates can be transmitted. According to the ATM concept, ATM cells of equal length are formed from various data streams with a digital transmission path which is the same at least across some sections. The structure of the ATM cells is standardised. The cells comprise a cell header of 5 bytes with control information and a payload space of 48 bytes. The control information among other things comprises details concerning the path which the respective cell has to take. Certain ATM service types have been introduced so as to fulfil the requirements of all telecommunication services in ATM networks. The ATM reference model represents the basis for describing these service types.
The ATM reference model is based on the principles of the OSI reference model; it is composed of a user plane, a control plane and a management plane (Gerd Siegmund: “ATM—The technology” 3rd edition Hüthig Publications, Verlag Heidelberg, pp. 91–92. [The aforementioned publication is in the German language, its original title being “ATM—Die Technik”.] FIG. 1 shows this reference model where the user plane is further divided into the layers “physical layer”, “ATM layer”, “adaptation layer” and “higher layers for user data”, with these layers having to be able to communicate with each other by way of suitable interfaces.
Interface units PHY which permit data transfer tailored to the respective transmission medium, form part of the physical layer.
Utopia Level 2 (The ATM Forum, Technical Committee: Utopia Level 2, Version 1.0 af-phy-0039.000, June 1995) provides a specification of the data path interface between the ATM layer and the interface unit PHY of the physical layer.
An ATM network can contain various devices which, as is the case with the interface units PHY of the physical layer, comprise registers and require a configuration and/or continuous monitoring of register values. For this reason, such devices must provide access for a management device via which configuration and/or monitoring is made possible.
Thus according to the UTOPIA level 2 specification, each of the interface units PHYs comprises a management interface (shown in Appendix 2) which is used by a management unit for configuring, administering and monitoring one or several PHYs. This management interface is in particular configured as a microprocessor interface.
Appendix 2 of Utopia Level 2 proposes a concrete design of management interfaces for interface units PHYs as a guideline for users. Usually this design is used. For example, in the case of a parallel interface, information is provided concerning required and optional interface signals as well as operations and read cycles.
If a management unit is to have access to several devices via its management interface, then connections between the management unit and all these devices must be established by using a bus. For example, an ATM network can comprise hundreds of interface units PHY, leading to considerable costs for these additional management networks.